x86 Opcode ICEBP

Opcode ICEBP

CPU: some models of i486, i386, Pentium, Pentium Pro
Type of Instruction: System

Instruction: ICEBP

Description:

IF (condition) THEN ; see condition below
{
CHANGED TO THE ICE instruction mode;
}
ELSE
{
INT 1;
}
END

Note: 386/486: Condition is DR7.bit12=1
(CPU must be supported ICE).

Note: This instruction very usefull to debbuging as Single-Byte Interrupt
but it generate never int 3, but int 1.

Note: On Pentium Interrupt redirection initiately disabled on PMCR
(Probe Mode Control Register), which is only accessable via debug port
i.e. Need external hardware for enable normal ICEBP execution.

Note: On Pentium Pro situation is the same.
But in Pentium Pro Intel named this instruction INT01.

Flags Affected: None

CPU mode: RM,PM0

Physical Form: ICEBP
COP (Code of Operation): F1H
Clocks: : N/A