CPU: Pentium III+ (KNI/MMX2), AMD Athlon (AMD EMMX)
Type of instruction: User
Guranteed that every store instruction that precedes in program
order the store fence instruction is globally visible before any
store instruction follows the fence is globally visible.
Physical Form and Timing:
SFENCE ---- 0F AE F8 ---- ?
Copyright by InternetNightmare 2005-2006