x86 Opcode RDSHR

Opcode RDSHR

CPU: Cyrix Cx6x86MX
Type of Instruction: SMM mode only

Instruction: RDSHR dest

Description:

dest <- SMHR (SMM Header pointer Register)

Note: Format of SMHR:
Bits Description
31..2 SMM Header pointer address
1 Reserved
0 (Valid)
if =1, then address valid

Note: SMHR pointed to phisical address SMM space area,
where will be saved non-SMM contex when entered SMM.

Format of SMM Header (for Cx6x86MX):
Address Size Description
(Relative (bit)
to SMH
pointer)
+00 32 DR7
-04h 32 EFLAGS
-08h 32 CR0
-0Ch 32 current EIP
-10h 32 next EIP
-14h 16 CS selector
-16h 16 Reserved
-18h 64 CS descriptor
-20h 16 Context
all reserved , but
22..21 CPL
-22h 16 Context
all reserved, but
15 N (Nested SMI indicator)
if = 1, current SMI serviced from SMM.
13 IS (Internal SMI indicator)
if = 1, current SMI is result of internal SMI
event.
if = 0, current SMI result of external event
4 H (SMI during CPU HALT state indicator)
if = 1, CPU was in halt or shutdown state,
before SMI.
3 S (Software SMM entry indicator)
if = 1, SMM is result of SMINT instruction
2 P (REP INSx/REP OUTSx indicator)
if = 1, current instruction have REP pfix.
1 I (IN,INSx,OUT,OUTx indicator)
if = 1, current instruction perform I/O
read/write
0 C (Code segment writable indicator)
if = 1, current code segment is writable,
if = 0, ---//---- is not writable.
-24h 16 I/O Data Size
-26h 16 I/O Write Address
-28h 32 I/O Write Data
-2Ch 32 ESI or EDI
total size of SMM header = 30h

Flags Affected: None

CPU mode: SMM

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Physical Form: RDSHR reg/mem32
COP (Code of Operation) : 0FH 36H Postbyte
Clocks Cx6x86MX: n/a