Opcode PSRLD
CPU: all which supported IA MMX:
Pentium (P55C only), Pentium (tm) Pro (P6) future models
Type of Instruction: User
Instruction: PSRLD dest,src
Description:
temp <- src
dest[31..0] <- dest[31..0] >> temp
dest[63..32] <- dest[63..32] >> temp
Note: Shift dwords in MMX register right by Imm8 or amount specified in MMX
register/memory, while shifting in zeros.
Flags affected: None
Exceptions:
RM PM VM SMM Description
#GP(0) If Illegal memory operand's EA in CS,DS,ES,FS,GS
#SS(0) If illegal memory operand's EA in SS
#PF(fcode) If page fault
#AC #AC If unaligned memory reference then alignment
check enabled and in ring 3.
#UD #UD #UD #UD If CR0.EM = 1
#NM #NM #NM #NM If CR0.TS = 1
#MF #MF #MF #MF If pending FPU Exception
#13 #13 If any part of the the operand lies outside of
the EA space from 0 to FFFFH
++++++++++++++++++++++++++++++++++++++
COP & Times:
PSRLD mm,mm/m64 0FH D2H PostByte
PSRLD mm,Imm8 0FH 72H/2 PostByte ImmData
P55C: n/a
future P6: n/a
Copyright by InternetNightmare 2005-2006