Opcode PMADDWD
CPU: all which supported IA MMX:
Pentium (P55C only), Pentium (tm) Pro (P6) future models
Type of Instruction: User
Instruction: PMADDWD dest,src
Description:
dest[31..0] <- dest[15..0] * src[15..0] + dest[31..16] * src[31..16]
dest[63..32] <- dest[47..32] * src[47..32] + dest[63..48] * src[63..48]
Note: Multiply the packed word in MMX register by the packed word in
MMXregister/memory. Add the 32-bit results pairwise and store in MMX
register as dword.
This instruction wraps around to 80000000H only when all four words
of both the source and destination operands are 8000H.
Flags affected: None
Exceptions:
RM PM VM SMM Description
#GP(0) If Illegal memory operand's EA in CS,DS,ES,FS,GS
#SS(0) If illegal memory operand's EA in SS
#PF(fcode) If page fault
#AC #AC If unaligned memory reference then alignment
check enabled and in ring 3.
#UD #UD #UD #UD If CR0.EM = 1
#NM #NM #NM #NM If CR0.TS = 1
#MF #MF #MF #MF If pending FPU Exception
#13 #13 If any part of the the operand lies outside of
the EA space from 0 to FFFFH
++++++++++++++++++++++++++++++++++++++
COP & Times:
PMADDWD mm,mm/m64 0FH F5H PostByte
P55C: n/a
future P6: n/a
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