x86 Opcode PAVEB

Opcode PAVEB

CPU: Cyrix with Extended MMX Instruction Set
Type of Instruction: User

Instruction: PAVEB dest, src

Description:
dest[7..0] <- (dest[7..0] + src[7..0]) >> 1
dest[15..8] <- (dest[15..8] + src[15..8]) >> 1
dest[23..16] <- (dest[23..16] + src[23..16]) >> 1
dest[31..24] <- (dest[31..24] + src[31..24]) >> 1
dest[39..32] <- (dest[39..32] + src[39..32]) >> 1
dest[47..40] <- (dest[47..40] + src[47..40]) >> 1
dest[55..48] <- (dest[55..48] + src[55..48]) >> 1
dest[63..56] <- (dest[63..56] + src[63..56]) >> 1

Notes: The PAVEB insruction calculates the average of the unsigned
bytes of the source operand and the unsigned bytes of the destination
operand and writes the result to the MMX register. The PAVEB
instruction cannot overflow.
M2 hardware versions before v1.3 interpret values as signed
bytes on this instruction.

Flags Affected: None

Exceptions:

RM PM VM SMM Description
#GP(0) If Illegal memory operands EA in CS,DS,ES,FS,GS
#SS(0) If Illegal memory operands EA in SS
#PF(fcode) If page fault
#AC #AC If unaligned memory reference then alignment
check enabled and in ring 3.
#UD #UD #UD #UD If CR0.EM = 1
#NM #NM #NM #NM If CR0.TS = 1
#MF #MF #MF #MF If pending FPU Exception
#13 #13 If any part of the operand lies outside of the
EA space from 0 to FFFFH
++++++++++++++++++++++++++++++++++
COP & Times:

PAVEB mm,mm/m64 0FH 50H PostByte