Opcode PADDW

CPU: all which supported IA MMX:
Pentium (P55C only), Pentium (tm) Pro (P6) future models
Type of Instruction: User

Instruction: PADDW dest,src


dest[15..0] <- dest[15..0] + src[15..0]
dest[31..16] <- dest[31..16] + src[31..16]
dest[47..32] <- dest[47..32] + src[47..32]
dest[63..48] <- dest[63..48] + src[63..48]

Note: This instruction adds the words of the source to the words of the
destination and writes the results to the MMX register.
When the result is too large to be represented in a packed word
(overflow), the result wraps around and the lower 16 bits are writen to
the destination register.

Flags affected: None


RM PM VM SMM Description
#GP(0) If Illegal memory operand's EA in CS,DS,ES,FS,GS
#SS(0) If illegal memory operand's EA in SS
#PF(fcode) If page fault
#AC #AC If unaligned memory reference then alignment
check enabled and in ring 3.
#UD #UD #UD #UD If CR0.EM = 1
#NM #NM #NM #NM If CR0.TS = 1
#MF #MF #MF #MF If pending FPU Exception
#13 #13 If any part of the the operand lies outside of
the EA space from 0 to FFFFH
COP & Times:

PADDW mm,mm/m64 0FH FDH PostByte

P55C: n/a
future P6: n/a

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