Opcode LDMXCSR
CPU: Pentium III+ (KNI/MMX2)
Type of instruction: User
Instruction: LDMXCSR src
Description:
MXCSR <- src;
Format of MXCSR:
Bits Description
31..16 Reserved
15 FZ (Flush to Zero)
14..13 RC (Round Control)
00 Round to nearest (even)
01 Round down (to minius infinity)
10 Round up (to positive infinity)
11 Round toward zero (Truncate)
12 PM (SIMD numeric exception masks)
11 UM
10 OM
9 ZM
8 DM
7 IM
6 Reserved
5 PE (SIMD numeric exceptions)
4 UE
3 OE
2 ZE
1 DE
0 IE
Physical Form and Timing:
LDMXCSR m32 ---- 0F AE /2 ---- ??
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